Анализ сайта darksilicon.org
Основное Готовность: 65%
Домен
darksilicon.org
Состояние доменного имени
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Проверяем корректность доменного имени и наличие технических проблем на уровне домена.
Домен второго уровня идеален для продвижения.
Отличный запоминающийся домен.
Ответ сервера
200 Успешный ответ
HTTP-код ответа и цепочка редиректов
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Код 200 — страница доступна. Коды 3xx — редиректы (цепочки замедляют загрузку и размывают ссылочный вес). Коды 4xx/5xx — ошибки, поисковик не сможет проиндексировать страницу.
Кол-во редиректов 3 слишком большое! Проверьте настройки сайта и веб-сервера!
Цепочка редиректов:
http://darksilicon.org
302 Found
http://michaeltaylor.org/
301 MovedPermanently
https://michaeltaylor.org/
200 OK
Безопасность
Сайт безопасен
Использование HTTPS и SSL-сертификат
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HTTPS — обязательный стандарт. Google и Яндекс отдают предпочтение защищённым сайтам. Отсутствие SSL или просроченный сертификат ведут к предупреждениям в браузере и снижению позиций.
Не настроен HSTS (Strict-Transport-Security) — рекомендуется включить.
На сайте работает защищенный протокол ssl и сайт открывается по https.
Ssl-сертификат действителен до 26.09.2026 18:57:51.
HTTP автоматически перенаправляется на HTTPS.
Поздравляем! Сайт не содержится в реестре РКН.
Кодировка
Кодировка символов страницы
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Стандарт — UTF-8. Неправильная кодировка вызывает нечитаемые символы и мешает поисковику корректно распознать текст страницы.
Кодировка на странице не определена. Укажите явно кодировку документа!
Язык
Атрибут lang в HTML-теге
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Атрибут lang (<html lang="ru">) сообщает поисковикам и браузерам, на каком языке написана страница. Помогает при ранжировании в региональном поиске.
Язык страницы не указан. Рекомендуется явно указать язык документа!
Скорость загрузки
~1,02сек
Время отклика сервера (TTFB)
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Time To First Byte — время до получения первого байта от сервера. Норма до 200 мс. Медленный отклик ухудшает пользовательский опыт и ранжирование: Яндекс и Google учитывают скорость страниц.
Скорость загрузки сайта 1,02сек превышает 1 секунду. Желательно улучшить работу сайта!
Объем документа
57Кб
Размер HTML-кода страницы
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Слишком большой HTML замедляет парсинг браузером и сканирование поисковым роботом. Рекомендуется не более 200 Кб.
Объем html-документа 57Кб оптимален.
Структура html-документа корректна.
Ресурсы
Ресурсы: 1
Внешние ресурсы страницы (CSS, JS, изображения)
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Количество и тип подключённых ресурсов влияют на скорость загрузки. Большое число запросов увеличивает время рендеринга страницы.
Кол-во файлов ресурсов 1 достаточно.
Показать полный список ресурсов
| Тип | Название | Значение |
|---|---|---|
| js | text/javascript | https://www.google-analytics.com/urchin.js |
Серверные заголовки
Кол-во: 17
HTTP-заголовки ответа сервера
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Заголовки сервера передают браузеру и поисковику служебную информацию: кеширование, безопасность (CSP, HSTS), сжатие (gzip). Правильная настройка ускоряет загрузку и повышает защищённость.
Найдены серверные заголовки 17шт. Подробнее про серверные заголовки.
Показать полный список серверных заголовков
| Ключ | Значение |
|---|---|
| Server | GitHub.com |
| Access-Control-Allow-Origin | * |
| ETag | "6a272e90-e4d7" |
| Cache-Control | max-age=600 |
| x-proxy-cache | MISS |
| x-github-request-id | BA2C:15BD:4DDC025:4E7F172:6A8A04B9 |
| x-github-edge-region | fra |
| Accept-Ranges | bytes |
| Age | 0 |
| Date | Sat, 22 Aug 2026 21:10:19 GMT |
| Via | 1.1 varnish |
| X-Served-By | cache-fra-eddf8230211-FRA |
| X-Cache | HIT |
| x-cache-hits | 0 |
| x-timer | S1787433020.553800,VS0,VE86 |
| Vary | Accept-Encoding |
| x-fastly-request-id | 536cb9ad82f4f9bc1ea4b838a76204b640c59510 |
CMS
Не определена
Система управления сайтом (движок)
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CMS — это движок, на котором работает сайт (WordPress, 1C-Bitrix, Tilda и др.). Знание CMS помогает понять возможности SEO-оптимизации и подобрать подходящие инструменты. «Не определена» — вероятно, самописный сайт или нестандартная сборка.
CMS не определена. Вероятно, сайт самописный либо движок надёжно скрыт. Это не ошибка.
Веб-сервер
GitHub.com
Программное обеспечение сервера
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Веб-сервер — это ПО, которое отдаёт страницы посетителям (nginx, Apache, IIS, LiteSpeed и др.). Определяется по серверным заголовкам ответа (Server, X-Powered-By и т.п.). «Не определён» — сервер намеренно скрывает эти заголовки, это нормальная практика безопасности.
В заголовке Server указано: GitHub.com.
Мета-теги Готовность: 24%
Title
ASIC Clouds, Dark Silicon, Tiled Processors, Specialization, Vision and Bitcoin
Заголовок страницы в браузере и поисковой выдаче
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Title — главный SEO-заголовок страницы. Влияет на CTR в поиске и ранжирование. Оптимальная длина: 50–70 символов. Ключевые слова — ближе к началу.
Необходимо уменьшить число символов в title (текущее значение: 79, оптимально: от 40 до 45)
Дублей словоформ в title не найдено.
Description
ASIC Cloud, Dark Silicon, Bitcoin, ASIC Cloud and chip design research.
Описание страницы в поисковой выдаче (сниппет)
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Meta Description — текст под заголовком в выдаче. Напрямую на позиции не влияет, но влияет на CTR. Оптимальная длина: 120–160 символов.
Необходимо увеличить число символов в description (текущее значение мало: 71, минимум: 80, оптимально: от 120 до 130)
Keywords
ASIC Cloud, dark silicon, Dark Silicon, bitcoin, Bitcoin,mike,taylor,cse mbt,michael taylor, manycore, tiled, architecture, many-core, multicore, compiler, VLSI, chip, Raw processor, MIT, UCSD, SD-VBS, vision processors, conservation cores, vision benchmarks, green droid, GreenDroid, greendroid
Список ключевых слов страницы (устаревший тег)
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Meta Keywords не учитывается Яндексом и Google для ранжирования с 2009–2012 годов. Заполнение не обязательно, но не вредит. Конкурент может использовать содержимое для анализа.
Keywords установлены.
Канонический Url
Указывает поисковику основную версию страницы
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Canonical (rel=canonical) предотвращает проблему дублей страниц. Должен точно совпадать с URL проверяемой страницы. Неправильный canonical может передать ссылочный вес на другую страницу.
Рекомендуем прописать канонический Url.
Robots
Ошибок нет
Директивы для поисковых роботов на уровне страницы
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Meta Robots управляет индексацией конкретной страницы: index/noindex — индексировать ли, follow/nofollow — следовать ли по ссылкам. Noindex полностью исключает страницу из поиска.
Meta-тег robots не указан. Страница свободна для индексации.
Адаптивность
Настройка масштабирования на мобильных устройствах
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Тег viewport (<meta name="viewport">) сообщает браузеру, как масштабировать страницу на мобильных. Стандарт: width=device-width, initial-scale=1. Отсутствие — признак отсутствия мобильной версии.
Meta-тег viewport не указан. Страница не адаптивная.
Разметка OpenGraph
Не найдено
Мета-теги для красивых превью в соцсетях
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OpenGraph (og:title, og:description, og:image) управляет тем, как страница выглядит при репосте в социальных сетях и мессенджерах. Отсутствие OG-тегов — невзрачный превью при шеринге.
Разметка OpenGraph не задана. Страница не оптимизирована под социальные сети. Мета-теги с разметкой Og помогают социальным роботам лучше структурировать Ваш сайт.
Все мета-теги
Кол-во: 3
Полный список мета-тегов страницы
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Таблица всех meta-тегов, включая нестандартные. Позволяет найти опечатки, дубли и лишние теги.
Найдены мета-теги 3шт. Мета-теги не видимы для человека и предназначены для обмена информацией между веб-страницей и поисковыми системами, браузерами и другими веб-службами. С ними роботы 🤖 и устройства ведут себя более ожидаемо.
Показать полный список мета-тегов
| Тип | Название | Значение |
|---|---|---|
| name | google-site-verification | 0i1Mz3swwJd6oR3f2xaCa-cNpvW8xgizEa56k0c6b8U |
| name | description | ASIC Cloud, Dark Silicon, Bitcoin, ASIC Cloud and chip design research. |
| name | keywords | ASIC Cloud, dark silicon, Dark Silicon, bitcoin, Bitcoin,mike,taylor,cse mbt,michael taylor, manycore, tiled, architecture, many-core, multicore, compiler, VLSI, chip, Raw processor, MIT, UCSD, SD-VBS, vision processors, conservation cores, vision benchmarks, green droid, GreenDroid, greendroid |
Оптимизация Готовность: 70%
Структура
Ошибок нет
Семантические HTML-элементы страницы
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Проверяет наличие основных структурных элементов: nav, header, footer, main. Корректная семантическая структура помогает поисковику понять архитектуру страницы.
Структура документа корректна (теги <html> и <body> присутствуют по одному на документ).
Контент
Есть ошибки
Объём и качество текстового содержимого
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Анализирует объём полезного текста на странице. Слишком мало — страница может считаться малополезной. Слишком много — ухудшается читаемость и восприятие.
Абзацев с текстом 0 слишком мало. Добавьте больше абзацев с текстом (тег <p>)!
Среднее число слов в абзаце 0 слишком мало. Сделайте контент более читаемым!
Слова из title 9 встречаются в тексте достаточно.
Кол-во знаков контента 33445 на странице оптимально.
Кол-во слов 5402 на странице оптимально.
Заголовки
Ошибок нет
Иерархия заголовков H1–H6
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H1 должен быть один и содержать ключевой запрос. H2–H6 описывают подразделы. Пропуск уровней (H1 → H3) и несколько H1 — типичные ошибки, снижающие понятность страницы для поисковика.
На странице присутствуют заголовки <h1> 1. Это прекрасно.
На странице присутствуют заголовки <h2> 7. Это хорошо.
Тошнота
7,75
Насколько одно слово доминирует в тексте
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Классическая тошнота = √(частота самого повторяющегося слова). Норма до 7–8: текст воспринимается естественно. Выше — поисковик может счесть страницу переспамленной.
Тошнота превышает норму 5. Измените текст страницы!
Академич. тошнота
17,22%
Насколько текст перенасыщен ключевыми словами
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Академическая тошнота = (частота слова / общее количество слов) × 100%. Показывает долю конкретного слова в тексте. Норма 5–15%.
Академическая тошнота превышает норму 5-15%. Измените текст страницы!
Семантическое ядро
20
Наиболее часто встречающиеся слова на странице
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Топ слов по частоте использования. Показывает, какие слова доминируют в тексте с точки зрения поисковика.
Контент страницы содержит осмысленный текст и слова.
Показать список слов
| Слово | Кол-во | Частота |
|---|---|---|
| silicon | 60 | 1,11% |
| michael | 30 | 0,56% |
| taylor | 30 | 0,56% |
| architecture | 27 | 0,50% |
| bitcoin | 23 | 0,43% |
| article | 23 | 0,43% |
| computer | 19 | 0,35% |
| research | 17 | 0,31% |
| design | 16 | 0,30% |
| bedford | 16 | 0,30% |
| utilization | 15 | 0,28% |
| application | 15 | 0,28% |
| engineering | 14 | 0,26% |
| processor | 14 | 0,26% |
| risc-v | 13 | 0,24% |
| clouds | 12 | 0,22% |
| multicore | 11 | 0,20% |
| mining | 11 | 0,20% |
| greendroid | 10 | 0,19% |
| asplos | 10 | 0,19% |
Индексация Готовность: 0%
Индексирование
Есть ошибки
Разрешено ли индексирование страницы
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Проверяет, не закрыта ли страница от индексации через robots.txt, meta robots или X-Robots-Tag. Страница, закрытая от индексации, не появится в поисковой выдаче.
Анкоров на странице 207 слишком много. Проведите ревизию и оптимизацию ссылок сайта.
Robots.txt
Найден корректный robots.txt
Файл управления сканированием сайта роботами
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Robots.txt указывает поисковым роботам, какие страницы сканировать, а какие — нет. Ошибки в файле могут случайно закрыть важные разделы от индексации.
Кол-во редиректов для файла robots.txt 3 слишком большое! Это может вызывать затруднение при индексации поисковыми роботами!
Проверяемая страница не запрещена в robots.txt.
Robots.txt доступен по постоянному адресу
Цепочка редиректов для файла robots.txt:
http://darksilicon.org/robots.txt
302 Found
http://michaeltaylor.org/
301 MovedPermanently
https://michaeltaylor.org/
200 OK
Показать содержимое robots.txt
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
<STYLE TYPE="text/css">
<!--
.code_section
{
font-family: Courier New Bold, Courier;
padding-left: 50pt;
padding-right: 50pt;
}
-->
</STYLE>
<meta name="google-site-verification" content="0i1Mz3swwJd6oR3f2xaCa-cNpvW8xgizEa56k0c6b8U">
<title>ASIC Clouds, Dark Silicon, Tiled Processors, Specialization, Vision and Bitcoin</title>
<META name="description" content="ASIC Cloud, Dark Silicon, Bitcoin, ASIC Cloud and chip design research.">
<META name="keywords" content="ASIC Cloud, dark silicon, Dark Silicon, bitcoin, Bitcoin,mike,taylor,cse mbt,michael taylor, manycore, tiled, architecture, many-core, multicore, compiler, VLSI, chip, Raw processor, MIT, UCSD, SD-VBS, vision processors, conservation cores, vision benchmarks, green droid, GreenDroid, greendroid">
<STYLE TYPE="text/css">
BODY {margin-right: 38pt}
BODY {font-family: "Verdana", "Times"}
</STYLE>
<!--[if IE]>
<STYLE TYPE="text/css">
BODY {font-size: 15px}
</STYLE>
<![endif]-->
</head>
<body bgcolor="#ffffff" text="#000000" link="#0000FF" alink="#FF2020" vlink="#aF101F">
<script language="JavaScript" type="text/javascript">
<!--
// PRELOADING IMAGES
if (document.images) {
img_on =new Image(); img_on.src ="pics/kremlin-logo-3.png";
img_off=new Image(); img_off.src="pics/kremlin-logo.png";
}
function handleOver() {
if (document.images) document.imgName.src=img_on.src;
}
function handleOut() {
if (document.images) document.imgName.src=img_off.src;
}
//-->
</script>
<!-- b><font size="+4"><a href="http://darksilicon.org">UCSD Center for Dark Silicon</a></font></b> -->
<table>
<tr>
<td>
<table>
<tr>
<td>
<!-- <IMG src="pics/mbt-portrait-480.jpg" align=left alt="Michael Taylor (CSE MBT)]"> -->
<!-- IMG src="pics/mbt_photo_14_z_480.jpg" align=left alt="Dark Silicon (MBT)"-->
<IMG border=1 src="pics/mbt_new_photo_13_320.jpg" align=left alt="Dark Silicon (MBT)">
<!-- IMG src="pics/wordle_2010.png" height=450 align = left alt="[Michael Taylor]"-->
<td align=center>
<br>
<br>
<b><font size="+2" color="#112200">Professor<br> Michael B. Taylor</font> <br></b>
<font color="#000077">
<font size="+1"><a href="research_team.html">Bespoke Silicon Group</a></font><br>
<font size="+1"><a href="http://darksilicon.org">Center for Dark Silicon</a></font><br>
<font size="+1">Paul Allen School of Computer Science and Engineering<br>
<font size="+1">Dept of Electrical Engineering<br>
<font size="+1"><b>University of Washington</b>, Seattle</font><br>
</font>
<hr width="80%">
<table>
<tr><td align=left>
<script type="text/javascript">
var a1 = "p";
var a4 = "@";
var a2 = "rof";
var a5 = "gmail.com";
var a3 = ".taylor";
var i;
for (i = 0; i < 5000; i++) {
if (i == 1999) {
document.write(a1+a2+a3+a4+a5);
}
}
</script>
<td>
<FONT size="-1"><b>professional correspondence</b></FONT><br>
<tr>
<td>
<script type="text/javascript">
var a1 = "prof";
var a4 = "uw";
var a2 = "mbt";
var a5 = ".edu";
var a3 = "@";
var i;
for (i = 0; i < 5000; i++) {
if (i == 1999) {
document.write(a1+a2+a3+a4+a5);
}
}
</script>
<td>
<FONT size="-1"><b>official UW business (course-related, funding, admin, rec letters, etc)</b></FONT><br>
<tr>
<td>
CSE 564 (Paul Allen Center)
<td>
<FONT size="-1"><b>office</b></FONT>
<tr>
<td>
<font color="555555">
+1 use email</font>
<td>
<FONT size="-1"><b>phone</b></FONT><br>
<tr>
<td>
<a href="https://www.youtube.com/playlist?list=PLD1QnhK1caR3IrAtVAd1-leMkus7dVy6a"><IMG SRC="pics/yt_logo_rgb_light.png" width=150></a>
<td>
<FONT size="-1"><b></b></FONT><br>
</table>
<td>
<td>
</table>
<br>
<table width="95%" align=left bgcolor="#DDDDEE" border="1" cellpadding="0" cellspacing="0">
<tr><td width="25%" align=center><a href="https://bsg.ai" style="text-decoration:none"><font size="+2"><b>Research Team</b></font></a>
<td width="20%" align=center><a href="teaching.html" style="text-decoration:none"><font size="+2"><b>Teaching</b></font></a>
<td width="18%" align=center><a href="service.html" style="text-decoration:none"><font size="+2"><b>Service</b></font></a>
<td width="32%" align=center><a href="ucsd-programming-team.html" style="text-decoration:none"><font size="+2"><b>Programming Team</b></font></a>
</table>
<br><br>
<br><b>NEWSFLASH:
<br>I am recruiting heavily for <b>both graduate students and postdocs</b> for my team at UW.
<br>Interested PhD/MS students and Postdocs should apply to either or both departments and drop me a note (2 chances, 1 great advisor!)</b>
<br>
<br><h2><font color="#000077">Bio</font></h2>
I have been a professor in the <a href="http://www.cs.washington.edu">Paul Allen School of Computer Science and
Engineering</a> and <a href="http://www.ee.washington.edu/">Dept. of Electrical Engineering</a> at the <a href="http://www.uw.edu">University of Washington, Seattle</a> since September 2017.
I was a Visiting Research Scientist at <a href="http://google.com">Google and YouTube</a>, working on datacenter accelerators,
and before that I was a tenured professor at the <a href="http://cseweb.ucsd.edu">University of California San Diego Computer Science and Engineering Department</a> from 2005 to 2016. <br> <br>
I
received a PhD in Electrical Engineering and Computer Science from <a href="http://www.mit.edu">MIT</a>, and
my research centers around computer architecture but spans the stack from VLSI to compilers.
I was lead architect of the 16-core <a href="https://bsg.ai/papers/Tiled_Microprocessors_MBT_Thesis.pdf">MIT Raw tiled
multicore processor</a>, one of the earliest multicore processors, which was commercialized into the Tilera
TILE64 architecture. Recently, in 2017, Intel Skylake SP has adopted our scalable mesh of cores architecture that we proposed.
I co-authored the earliest published architecture research on <a href="http://darksilicon.org">dark silicon</a>, the result of the end of Dennard scaling,
including <a href="https://bsg.ai/papers/asplos_2010_ccores.pdf">a paper that derives the <i>utilization wall</i> that causes dark silicon</a>,
and in that paper proposed specialization as the primary way this probably would be attacked.
To demonstrate these ideas, we proposed a prototype massively specialized processor called
<a href="https://bsg.ai/papers/GreenDroid_IEEE_Micro_2011.pdf">GreenDroid</a>, and in that work claimed that the
future chips would start incorporating exponentially growing numbers of accelerators, a hypothesis which
has come true for Apple iPhone chips, as shown <a href="http://vlsiarch.eecs.harvard.edu/research/accelerators/die-photo-analysis/">in this innovative study</a> by David Brooks's team at Harvard.
I also wrote a paper that establishes the definitive taxonomy, <a href="https://bsg.ai/papers/taylor_dark_silicon_horsemen_dac_2012.pdf">the Four Horsemen</a>, for the semiconductor industry's approaches
to dealing with the problem, and a follow-on paper on the <a href="https://bsg.ai/papers/taylor_landscape_ds_ieee_micro_2013.pdf">Landscape of the Dark Silicon Design Regime</a>.
My research on dark silicon fed into the ITRS 2008 report that led Mike Mueller of ARM to coin the term "dark silicon".
More recently, I wrote <a href="https://bsg.ai/papers/bitcoin_taylor_cases_2013.pdf">the first academic paper on Bitcoin mining chips</a> and in this paper proposed that
this was evidence of a totally new model for chip development: rather than the old model of traditional chip companies figuring and selling general-purpose
compute chips that were targeted to a wide audience and not specific to a particular application domain; we would have
"a new age of hardware innovation tailored to
emerging application domains—an Age of Bespoke Silicon". Effectively
their former customers would drive the creation of "bespoke silicon chips" for their specific application needs.
<br>
<br>
<div id="asiccloud"></div>
This prediction has since come true; every hyperscale datacenter company (i.e. Facebook, Alibaba, Google, Microsoft, ...) has their own domain specific chips under development. Immediately after that paper, from 2013-2016, we worked on the concept of <i>ASIC Clouds</i>. In 2016, my team published the first paper on <a href="https://bsg.ai/papers/ASIC_Cloud_ISCA_2016_Proceedings.pdf">ASIC Clouds</a>.</b>
We make the case that datacenters full of ASICs are in our near future, and show a prototypical
<a href="https://bsg.ai/papers/ASIC_Cloud_ISCA_2016_Proceedings.pdf">ASIC Cloud</a> architecture, how they should be designed, and
how they save TCO.</a> We proposed neural network ASIC Clouds
<a href="https://csetechrep.ucsd.edu/Dienst/UI/2.0/Describe/ncstrl.ucsd_cse/CS2016-1016">before</a> Google announced their TPU, and
also proposed the use of video transcoding clouds for YouTube, an approach which Google adopted subsequent to the publication of our paper and <a href="https://dl.acm.org/doi/abs/10.1145/3445814.3446723">disclosed in ASPLOS 2021.</a>
This paper has a nice overview and retrospective of the work <a href="https://bsg.ai/papers/ASIC_Cloud_CACM_2020.pdf">Communications of the ACM ASIC Cloud paper</a>.
This paper was also selected to be a ACM Research Highlight; on average only two papers per year out of all of computer architecture publications
in the world!
<br><br>
<b> In 2017, we published the first architecture paper on <a href="https://bsg.ai/papers/Khazraee_ASIC_Cloud_NRE_ASPLOS_2017_final.pdf">NRE</a>, non-recurring engineering expense.</b> We show how minimizing NRE can be more important for ASIC Cloud feasibility than optimizing accelerator speedup or energy efficiency. We present the first ever architect's model for NRE, using current industry parameters (<a href="https://bsg.ai/papers/Khazraee_ASIC_Cloud_NRE_ASPLOS_2017_final.pdf">paper</a>) (<a href="https://www.youtube.com/watch?v=DzCO3qx61XY">youtube talk</a>), and opening up a new area of research. With the rise of specialization and the end of Moore's law, driving down the cost of design will surely be an important driver of future research.
<br><br>
Also in 2017, we designed the architecture and wrote the RTL for the open source 511-core RISC-V compatible Celerity chip,
and together with Michigan taped it out in TSMC 16nm technology. The chip broke the world record for all silicon chips on the planet for Coremark performance
and also beat the world record for single-chip RISC-V chip performance by over 100X.
<br><br>
Returning the favor for Michigan, we taped out and brought up the Michigan OuterSpace sparse matrix chip, in TSMC 40nm technology.
<br><br>
<b>More recently, at UW my team taped out and brought up two complex Global Foundries 12nm chips -- on the same day! This
is unprecedented for a university.</b>
<br><br>
One is for the DARPA POSH BlackParrot RISC-V multicore project.
<br><br>The other is for the DARPA SDH-funded HammerBlade RISC-V GP-GPU project.</b>
<br>
<br>Both designs are fully open source.
<br>
<!-- <br><br>
I was a rebellious undergraduate in the <a href="http://www.dartmouth.edu">Dartmouth College</a> CS department,
where I pulled together a team of students to build my first machine, the PM IV. It had 72 chips
and over 5000 hand-wired connections. -->
<br><br> I occasionally help companies and other legal professionals evaluate their patent portfolios,
and provide advice to companies leveraging the Tilera TILE64 architecture, or that are developing cryptocurrency hardware. I have broad expertise in hardware and software, and on the <b>Bitcoin cryptocurrency</b>.
My research is funded primarily by the National Science Foundation (NSF), including the <b>Secure and Trustworthy Cyberspace Program</b>, and <a href="http://futurearchs.org">DARPA/SRC's C-FAR and ADA</a> centers.
<br><br> Between the gaps at school, I worked on Apple's NuKernel microkernel, and co-wrote the first version
of Connectix Virtual PC, an x86-to-PowerPC dynamic translation engine, which was acquired by Microsoft. I also
contributed to the <a href="http://www.chipwrights.com">ChipWrights Visual Signal Processor</a> in its
earliest stages.
<br>
<br>I received the NSF CAREER Award in 2009 and tenure in 2012.
<br>
<br>My research sponsors:
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<td width="200"><a href="http://www.src.org/program/starnet/c-far/"><img width="300" src="pics/CFar.jpg" alt="C-FAR Logo"></a>
<td width="200"><a href="http://nsf.gov"><img width="200" src="pics/NSF_logo.jpg" alt="NSF Logo"></a>
<td width="200"><img width="200" src="pics/DARPA_logo.jpg" alt="DARPA Logo"></a>
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<td width="200"><img width="200" src="pics/nokia-logo.jpg" alt="NSF logo">
<td width="200"><img width="200" src="pics/intel.png" alt="Intel Logo">
<td width="200"><img width="100%" src="pics/AMD.png" alt="AMD logo">
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<td width="200"><img width="300" src="pics/qualcomm-logo.png" alt="Qualcomm logo">
<td width="200"><img width="100" src="pics/NXP_logo.png" alt="NXP logo">
</table>
<br>
<br>
<div id="darksilicon"></div>
<br><h2><a href="http://darksilicon.org" style="text-decoration: none"><font color="#000077">UW Center for Dark Silicon</font></a></h2>
<hr width="100%">
<br>I direct the
<b> <a href="http://darksilicon.org">UW Center for Dark Silicon</a></b> and the <a href="research_team.html">Bespoke Silicon Group.</a>
<br>
<br> <a href="http://greendroid.ucsd.edu">My colleagues and I</a> were among the first to demonstrate
the existence of a <a href="https://bsg.ai/papers/asplos_2010_ccores.pdf">utilization wall</a>
which says that with the progression of Moore's Law, the percentage of a chip that we can actively use within a chip's power budget is dropping <i>exponentially</i>! The remaining silicon
that must be left unpowered is now referred to as <a href="http://darksilicon.org">Dark Silicon</a>.
<br><br>Our research on <a href="https://bsg.ai/papers/asplos_2010_ccores.pdf">Conservation Cores</a> and <a href="https://bsg.ai/papers/GreenDroid_IEEE_Micro_2011.pdf">GreenDroid</a> proposes new architectures that exploit dark silicon. Our paper on the <a href="https://bsg.ai/papers/taylor_dark_silicon_horsemen_dac_2012.pdf">The Four Horsemen</a> (<a href="https://bsg.ai/papers/DAC_DaSi_Horsemen_2012_Slides_Final.pdf">slides</a>) overviews the landscape of architectural approaches to addressing dark silicon.
In addition to researching architectures for dark silicon, I look more broadly at sources of under-utilization
in current day chips, spanning from
a) power limitations because of poor CMOS scaling, b) overly large software engineering costs for parallelizing programs for multicore chips, and
c) lack of parallel application domains.
<br><br>My research attacks each of these problems by 1) reinventing processor design to make use of dark silicon, 2) utilizing existing cores better through better parallel software engineering tools and 3) finding new parallel application classes to put cores to work:
<table>
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<td>
<td>
<table>
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<td><a href="http://greendroid.ucsd.edu/"><img width=200 src="pics/greendroid-small.png" alt="GreenDroid"></a>
<td>
<td><br><br><br>The <a href="http://greendroid.ucsd.edu/"><i>GreenDroid</i></a> Mobile Applications Processor, which employs
<i><a href="https://bsg.ai/papers/asplos_2010_ccores.pdf">Conservation Cores</a></i> to fight dark silicon.
<table width="75%">
<tr>
<td>
<td><br>Our <i><a href="https://bsg.ai/papers/asplos_2010_ccores.pdf">ASPLOS 2010</a></i> paper is one of the earliest
peer-reviewed architecture papers to have a cogent description of the <i>utilization wall</i> that
causes the Dark Silicon problem, and to propose specialization as an architectural solution.
<br><br>
<tr>
<td>
<td>Our <i><a href="https://bsg.ai/papers/HotChips2010-Goulding-final.pdf">Hotchips 2010</a></i> work
<i>GreenDroid: A Mobile Application Processor for a Future of Dark Silicon</i> flushes out this proposal,
and is quite possibly the first published academic use of the term <a href="http://darksilicon.org/">Dark Silicon</a>. This was
followed up with
this <i><a href="https://bsg.ai/papers/GreenDroid_IEEE_Micro_2011.pdf">March 2011 IEEE Micro paper</a></i>. (Here is the Hotchips talk on <a href="http://www.youtube.com/watch?v=oZ2K7OGD_jQ#t=1h20m38s">youtube</a>.) <br><br>
<tr><td>
<td>Our work, <i>Is Dark Silicon Useful? Harnessing the Four Horsemen of the Coming Dark Silicon Apocalypse</i>, which appeared in <a href="https://bsg.ai/papers/taylor_dark_silicon_horsemen_dac_2012.pdf">DAC and DaSi 2012</a>, and is followed by a paper in IEEE Micro 2013, is the first paper to overview the landscape of architectural approaches that try to address the dark silicon problem. We describe the four horsemen -- four approaches to dealing with dark silicon, each with deep-seated challenges but also unique capabilities. See the <a href="https://bsg.ai/papers/DAC_DaSi_Horsemen_2012_Slides_Final.pdf">slides</a> for a very entertaining presentation on the shrinking, dim, specialized, and deux ex machina horsemen.<br><br>
<img src="pics/four_horsemen.png" alt="Four Horseman">
</table>
<tr>
<td><br><br>
<a href="http://kremlin.ucsd.edu" onMouseOver="handleOver();return true;" onMouseOut="handleOut(); return true;">
<img name=imgName height=200 src ="pics/kremlin-logo.png" alt="Kremlin Logo"></a>
<!--
<PRE>
$> make CC=kremlin-cc
$> ./tracking data
$> kremlin tracking &-&-personality=openmp
File (lines) Self-P Cov.(%)
1 imageBlur.c (49-58) 145.3 9.7
2 imageBlur.c (37-45) 145.3 8.7
3 getInterpPatch.c (26-35) 25.3 8.86
4 calcSobel_dX.c (59-68) 126.2 8.1
5 calcSobel_dX.c (46-55) 126.2 8.1
... ... ... ...
</PRE>
-->
<td>
<td> <a href="http://kremlin.ucsd.edu">Kremlin</a>, a tool that, given a serial program,
tells you which regions to parallelize.
<table width="75%">
<tr>
<td>
<td>
<br>
To create Kremlin, we developed a novel dynamic analysis, <a href="https://bsg.ai/papers/pldi-garcia-kremlin-2011.pdf"><i>hierarchical critical path analysis</i></a>, to detect parallelism across nested regions of the program,
which connects to a <i>parallelism planner</i> which evaluates many potential parallelization to figure out the best way for the user to parallelize the target program.
</table>
<tr>
<td><br><br><br><img width=200 src ="pics/stingray.jpg" alt="Stingray Picture">
<td>
<td> the <a href="vision/">San Diego Vision Benchmark Suite</a>, which distills the emerging computer vision application class into a collection
of nine benchmarks written in a research-friendly style. This work was co-advised by <a href="http://vision.ucsd.edu">Prof. Serge Belongie</a>, a member of UC San Diego's top-notch vision faculty. <br><br>More recently, we have developed <a href="http://cortexsuite.org">CortexSuite</a>, which extends SD-VBS with a large suite of machine learning and other applications that traditionally the brain has been better at that computers.
</table>
<br>
<!-- - the <a href="http://parallel.ucsd.edu/Projects/88A9158B-6330-4557-B208-459C7534E525.html">Photon</a> MATLAB manycore compiler,
<br><br> -->
<br>
<br>
</table>
<div id="top"></div>
<br><h2><font color="#000077">Greatest Hits</font> <font size="-1">(<a href="https://bsg.ai/#publications">Click to view all publications</a>)</font></h2>
<hr width="100%">
<table>
<tr><td width="115"><td>
<ol>
<li><b>ReaLLM: A Trace-Driven Framework for Rapid Simulation of Large-Scale LLM Inference</b>
<br>Huwan Peng, Scott Davidson, C.-J. Richard Shi and Michael Taylor. In <i>ASAP 2025</i>.
<br>
<br>
<li><b>Evaluating Ruche Networks: Physically Scalable, Cost-Effective, Bandwidth-Flexible NoCs</b>
<br> Dai Cheol Jung and Michael Taylor. In <i> ISCA 2025</i>.
<br>
<li><b>Scalable, Programmable and Dense: The HammerBlade Open-Source RISC-V Manycore.</b>
<br> Dai Cheol Jung, Max Ruttenberg, Paul Gao, Scott Davidson, Daniel Petrisko, Kangli Li, Aditya K Kamath, Lin Cheng, Shaolin Xie, Peitian Pan, Zhongyuan Zhao, Zichao Yue, Bandhav Veluri, Sripathi Muralitharan, Adrian Sampson, Andrew Lumsdaine, Zhiru Zhang, Christopher Batten, Mark Oskin, Dustin Richmond, Michael Bedford Taylor.
<br> in <i>ISCA 2024</i>. (<a href="papers/HB_ISCA_2024_Camera_Ready_Final.pdf">pdf</a>) (<a href="bib/all.html#Jung_ISCA_2024">bib</a>)
<br>
<br>
<li><b>RETROSPECTIVE: ASIC Clouds: Specializing the Datacenter.</b>
<br> by Michael Taylor.
<br> in <i>ISCA@50 Retrospective: 1996-2020, June 2023</i> (<a href="papers/Magaki_2016_ASIC_Retro.pdf">pdf</a>)
<br>
<br>
<li><b>RETROSPECTIVE: Evaluation of the RAW Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams.</b>
<br> by Michael Taylor, David Wentzlaff, Saman Amarasinghe and Anant Agarwal
<br> in <i>ISCA@50 Retrospective: 1996-2020, June 2023</i> (<a href="papers/Taylor_2004_Evaluation_Retro.pdf">pdf</a>)
<br>
<br>
<li><b>NoC Symbiosis.</b>
<br>Daniel Petrisko, Chun Zhao, Scott Davidson, Paul Gao, Dustin Richmond and Michael Bedford Taylor.<br>
in <i> NOCS 2020</i>.
(<a href="https://bsg.ai/papers/NOC_Symbiosis.pdf">pdf</a>)
<br><br>
<li><b>Ruche Networks: Wire-Maximal, No-Fuss NoCs.</b>
<br>Dai Cheol Jung, Scott Davidson, Chun Zhao, Dustin Richmond, Michael Bedford Taylor.
<br>in <i>NOCS 2020</i>
(<a href="https://bsg.ai/papers/Jung_NOCS_2020_Ruche_Networks.pdf">pdf</a>)
<br>
<br>
<li><b>ASIC Clouds: Specializing the Datacenter for Planet-Scale Applications.</b> Michael Bedford Taylor, Luis Vega, Moein Khazraee, Ikuo Magaki, Scott Davidson, Dustin Richmond. In <i>Communications of the ACM</i>, July 2020. (<a href="https://bsg.ai/papers/ASIC_Cloud_CACM_2020.pdf">pdf</a>)(<a href="http://bsg.ai/bib/all.html#ASIC_Clouds_CACM_2020">bib</a>)
<br><br>
<li><b> BlackParrot: An Agile Open-Source RISC-V Multicore for Accelerator SoCs. </b> Daniel Petrisko, Farzam gilani, Mark Wyse, Dai Cheol Jung, Scott Davidson, Paul Gao, Chun Zhao, Zahra Azad, Sadullah Canakci, Bandhav Veluri, Tavio Guarino, Ajay Joshi, Mark Oskin and Michael Bedford Taylor. In <i>IEEE Micro</i>, July/August 2020. (<a href="https://bsg.ai/papers/BlackParrot_IEEE_Micro_2020.pdf">pdf</a>)(<a href="http://bsg.ai/bib/all.html#BlackParrot_IEEE_Micro_2020">bib</a>)<br><br>
<li><b>The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric.</b>
<br>by Scott Davidson, Shaolin Xie, Chris Torng, Khalid Al-Hawaj, Austin Rovinski, Tuto Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald Dreslinski, Christopher Batten, Michael Bedford Taylor.
<br><i>IEEE Micro</i>, March/April 2018. (<a href="https://bsg.ai/papers/Davidson_IEEE_Micro_Celerity_2018.pdf">pdf</a>)(<a href="http://bsg.ai/bib/all.html#Davidson_Celerity_IEEE_Micro">bib</a>)
<br><i>Proceedings of Hotchips, 2017</i>. (<a href="https://bsg.ai/papers/HC29.21.430-Celerity-RISC-V-Davidson-UCSD.pdf">pdf</a>)(<a href="http://bsg.ai/bib/all.html#Ajayi_Celerity_Hotchips_2017">bib</a>)
<br>
<br>
<li><b>BaseJump STL: SystemVerilog needs a Standard Template Library for Hardware Design.</b>
<br> Michael B. Taylor.
<br> <i>Design Automation Conference</i> (<i>DAC</i>), June 2018. (<a href="https://bsg.ai/papers/Taylor_DAC_BaseJump_STL_2018.pdf">pdf</a>)(<a href="http://bsg.ai/bib/all.html#Taylor_BaseJump_DAC_2018">bib</a>)(<a href="https://bsg.ai/papers/BaseJump_STL_DAC_Slides.pdf">talk</a>)
<br>
<br>
<li><b>The Evolution of Bitcoin Hardware.</b>
<br><i>This is a great overview of Bitcoin mining hardware evolution, a follow-on to my CASES 2013 paper, it updates that groundbreaking paper to 2017.</i>
<br> Michael Bedford Taylor.
<br><i>IEEE Computer, Sept 2017</i>.(<a href="https://bsg.ai/papers/Taylor_Bitcoin_IEEE_Computer_2017.pdf">pdf</a>)(<a href="http://bsg.ai/bib/all.html#Taylor_Bitcoin_IEEE_Computer_2017">bib</a>)
<br>
<br>
<li><b>Specializing a Planet's Computation: ASIC Clouds.</b>
<br> <i>Read this to get a great overview of ASIC Clouds.</i>
<br>Moein Khazraee, Luis Vega, Ikuo Magaki and Michael Bedford Taylor.
<br><i>IEEE Micro, May/June 2017</i>.
(<a href="https://bsg.ai/papers/micro_asic_cloud.pdf">pdf</a>)(<a href="http://bsg.ai/bib/all.html#Khazraee_ASIC_Cloud_IEEE_MICRO_2017">bib</a>)
<br><br>
<li><b>Moonwalk: NRE Optimization in ASIC Clouds or, accelerators will use old silicon.</b>
<br> <i>Cite this for the first paper to give a detailed NRE model<br> and show how NRE can be optimized/evaluated for ASIC Clouds.</i>
<br>Moein Khazraee, Lu Zhang, Luis Vega, and Michael Bedford Taylor.
<br><i>ASPLOS 2017</i>.
(<a href="https://bsg.ai/papers/Khazraee_ASIC_Cloud_NRE_ASPLOS_2017_final.pdf">paper</a>) (<a href="https://www.youtube.com/watch?v=DzCO3qx61XY">youtube talk</a>) (<a href="https://bsg.ai/papers/ASPLOS_2017_ASIC_Cloud_NRE_Talk.pdf">talk</a>)(<a href="http://bsg.ai/bib/all.html#Khazraee_ASIC_Cloud_NRE_ASPLOS_2017">bib</a>).
<br>
<br>
<li><b>ASIC Clouds: Specializing the Datacenter.</b>
<br> <i>Cite this for the first paper that proposes ASIC Clouds <br>and defines the canonical ASIC Cloud architecture. We predicted the Google TPU before it was announced, and also forecast the deployment of video transcoding clouds, which Facebook announced in March 2019. Selected as a 2016 Top Picks Paper.</i>
<br> Ikuo Magaki, Moein Khazraee, Luis Vega Gutierrez, and Michael Bedford Taylor.
<br><i>International Symposium on Computer Architecture (ISCA)</i>, June 2016. <br> (<a href="https://bsg.ai/papers/ASIC_Cloud_ISCA_2016_Proceedings.pdf">paper</a>) (<A HREF="http://bsg.ai/bib/all.html#Magaki_ASIC_Cloud">bib</a>) <br> (<a href="https://bsg.ai/papers/ISCA_2016_ASIC_Cloud_Talk_No_Anim.pdf">teaser talk; contains only part of paper</a>)<br>(<a href="https://csetechrep.ucsd.edu/Dienst/UI/2.0/Describe/ncstrl.ucsd_cse/CS2016-1016">5/8/16 Tech Report</a>)<br><br>
<li><b>Bitcoin and The Age of Bespoke Silicon.</b><br><i>(Read this for the first-ever academic publication on Bitcoin mining hardware,<br> a stirring account of the Bitcoin mining community that <br> heralds a new age of
hardware innovation tailored to emerging application domains)</i>
<br> Michael Bedford Taylor
<br> <i>
International Conference on Compilers, Architecture and Synthesis for Embedded Systems </i> (<i>CASES</i>), Sept 2013. (<a href="https://bsg.ai/papers/Bitcoin-Taylor-CASES-2013-talk.pdf">Talk</a>) (<a href="https://bsg.ai/papers/bitcoin_taylor_cases_2013.pdf">Paper</a>) (<a href="http://bsg.ai/bib/all.html#Taylor_Bitcoin_CASES_2013">bib</a>)<br>
<br>
<li><b> A Landscape of the New Dark Silicon Design Regime.</b>
<br> Michael Taylor.
<br><i>IEEE Micro</i>, Sep/Oct 2013. (<a href="https://bsg.ai/papers/taylor_landscape_ds_ieee_micro_2013.pdf">pdf</a>) (<a href="http://bsg.ai/bib/all.html#Taylor_Landscape_IEEE_Micro_2013">bib</a>)
<br><i>Design Automation and Test in Europe (DATE)</i>, April 2014. <a href="https://www.youtube.com/watch?v=e25IwXZNJ6M">DATE 2014 talk</a>.
<br> <i> Berkeley E3S Symposium, Oct 2013.</i><br>
<br>
<li><b>Is Dark Silicon Useful?<br> <i>Harnessing the Four Horsemen of the Coming Dark Silicon Apocalypse</i></b> <br><i>(Cite this for first synthesis of approaches to attacking Dark Silicon.)</i>
<br> Michael B. Taylor
<br> Design Automation Conference (<i>DAC</i>), June 2012. (<a href="https://bsg.ai/papers/taylor_dark_silicon_horsemen_dac_2012.pdf">pdf</a>) (<a href="http://bsg.ai/bib/all.html#Taylor_Dark_Silicon_Horsemen_DAC_2012">bib</a>) (<a href="https://bsg.ai/papers/DAC_DaSi_Horsemen_2012_Slides_Final.pdf">slides</a>).
<br>
<i>Also presented at the Dark Silicon Workshop (DaSi) 2012.</i>
<Br>
<br>
<li><b> Conservation Cores: Reducing the Energy of Mature Computations</b>. <br><i>(Cite this for first peer-reviewed Utilization Wall & Dark Silicon Analysis. <br> Also for heterogeneity as a solution to dark silicon problem.)</i>
<br> Ganesh Venkatesh, John Sampson, Nathan Goulding, Saturnino Garcia, Slavik Bryskin, Jose Lugo-Martinez, Steven Swanson, and Michael Bedford Taylor.
<br> <i> Architectural Support for Programming Languages and Operating Systems (ASPLOS)</i>, March 2010. (<a href="https://bsg.ai/papers/asplos_2010_ccores.pdf">pdf</a>) (<a href="https://bsg.ai/papers/asplos_2010_ccores_talk.pdf">talk pdf</a>, <a href="https://bsg.ai/papers/asplos_2010_ccores_talk.ppt">talk ppt</a>) (<a href="http://bsg.ai/bib/all.html#Venkatesh_CCore_ASPLOS_2010">bib</a>)
<br><br>
<li><b> GreenDroid: A Mobile Application Processor for a Future of Dark Silicon.</b> <i> <br>(Cite this for dark silicon's impact on multicore scaling. <br>Also, for proposing the use of HLS-generated accelerators as a way to scale energy efficiency in the mobile space, a path that Apple and Qualcomm have since taken.)</i>
<br> Nathan Goulding, Jack Sampson, Ganesh Venkatesh, Saturnino Garcia, Joe Auricchio, Jonathan Babb, Michael Bedford Taylor and Steven Swanson.
<br> <i>Proceedings of HOTCHIPS</i>, August 2010. (<a href="https://bsg.ai/papers/HotChips2010-Goulding-final.pdf">pdf</a>) (<a href="https://bsg.ai/papers/hotchips-2010-goulding-final.pptx">talk ppt</a>) (<a href="http://bsg.ai/bib/all.html#Goulding_GreenDroid_HOTCHIPS_2010">bib</a>) (<a href="http://www.youtube.com/watch?v=oZ2K7OGD_jQ#t=1h20m38s">youtube</a>)<br><br>
<li><b> The GreenDroid Mobile Application Processor: An Architecture for Silicon's Dark Future.</b>
<br> Nathan Goulding-Hotta, Jack Sampson, Ganesh Venkatesh, Saturnino Garcia, Joe Auricchio, Po-Chao Huang, Manish Arora, Siddhartha Nath, Jonathan Babb,
Steven Swanson, and Michael Bedford Taylor.
<br> <i>IEEE Micro</i>, March 2011. (<a href="https://bsg.ai/papers/GreenDroid_IEEE_Micro_2011.pdf">pdf</a>) (<a href="http://bsg.ai/bib/all.html#Goulding_GreenDroid_Micro_2011">bib</a>)
<br><br>
<li><b> Kremlin: Rebooting and Rethinking <font face="courier">gprof</font> for the Multicore Age </b> (Cite this for Kremlin.)
<br> (aka <i>Automatic Parallelism Planning and Discovery with Kremlin</i>)
<br> Saturnino Garcia, Donghwan Jeon, Chris Louie, and Michael Bedford Taylor.
<br>Programming Language Design and Implementation (<i>PLDI</i>), June 2011. (<a href="https://bsg.ai/papers/pldi_2011_kremlin_garcia.pdf">pdf</a>) (<a href="http://bsg.ai/bib/all.html#Garcia_Kremlin_PLDI_2011">bib</a>)
<br>
<br>
<li><b>SD-VBS: The San Diego Vision Benchmark Suite</b>.
<br> Sravanthi Kota Venkata, Ikkjin Ahn, Donghwan Jeon, Anshuman Gupta, Christopher Louie, Saturnino Garcia, Serge Belongie, and Michael Bedford Taylor.
<br><i>IEEE International Symposium on Workload Characterization</i> (<i>IISWC</i>), October 2009. (<a href="https://bsg.ai/papers/SD-VBS-Final.pdf">pdf</a>) (<a href="http://cseweb.ucsd.edu/~mbtaylor/vision">Download SD-VBS</a>) (<a href="http://bsg.ai/bib/all.html#Venkata_VBS_IISWC_2009">bib</a>)
<br><br>
<li><b>Evaluation of the Raw Microprocessor: <br>An Exposed-Wire-Delay Architecture for ILP and Streams</b>
<BR> by Michael B Taylor, Walter Lee, Jason Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matt Frank, Saman Amarasinghe, and Anant Agarwal.
<BR><I>Proceedings of the International Symposium on Computer Architecture</I> (<i>ISCA</i>), June 2004. (<A HREF="https://bsg.ai/papers/raw_isca_2004.pdf">pdf</A>) (<a href="http://bsg.ai/bib/all.html#Taylor_ISCA_2004">bib</a>)
<BR><br>
<li><b>A 16-issue multiple-program-counter microprocessor<br>
with point-to-point scalar operand network</b>,
<br>by Michael B Taylor, Jason Kim, Jason Miller,
David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffman, Paul Johnson,
Walter Lee, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Saman Amarasinghe,
and Anant Agarwal.
<br><i>Proceedings of the IEEE International Solid-State
Circuits Conference</i> (<i>ISSCC</i>), February 2003. (<A HREF="https://bsg.ai/papers/isscc_2003_paper.pdf">pdf</A>) (<a href="http://bsg.ai/bib/all.html#Taylor_ISSCC_2003">bib</a>)
<br><br>
<li><b>The Raw Microprocessor:<br> A Computational Fabric for Software Circuits and General Purpose Programs</b>,
<br>by Michael B Taylor, Jason Kim, Jason Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffman, Jae-Wook
Lee, Paul Johnson, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matt Frank, Saman Amarasinghe and Anant Agarwal.
<br><i>IEEE Micro</i>, March/April 2002. (<A HREF="https://bsg.ai/papers/ieee-micro-2002.pdf">pdf</A>) (<a href="http://bsg.ai/bib/all.html#Taylor_Micro_2002">bib</a>)
<br><br>
<li><b>Scalar Operand Networks</b>,
<BR> by Michael B Taylor, Walter Lee, Saman Amarasinghe, and Anant Agarwal.
<BR><I>IEEE Transactions on Parallel and Distributed Systems (Special Issue on On-chip Networks)</I> (<i>TPDS</i>), February 2005.
<!-- (<A HREF="http://cseweb.ucsd.edu/papersson-tm.pdf">pdf</A>) -->
(<A HREF="https://bsg.ai/papers/taylor_son_ieee_tpds.pdf">pdf</A>)
(Appendix <A HREF="https://bsg.ai/papers/taylor_son_ieee_tpds_appendix.pdf">pdf</A>) (<a href="http://bsg.ai/bib/all.html#Taylor_SON_TPDS_2005">bib</a>)
<br><br>
</ol>
</table>
<h2><font color="#000077">Recent News</font> </h2>
<hr>
<div id="news"></div>
<table width="100%" cellpadding=6>
<tr><td><b>May 2023</b><td>An <a href="https://www.geekwire.com/2023/univ-of-washington-jostling-for-a-slice-of-rd-funding-from-the-chips-and-science-act/">GeekWire article</a> on some of Prof. Taylor's CHIPS Act fund raising activities.</td>
<tr><td><b>April 2020</b><td>Coindesk writes an article leveraging the graphs from my <a href="https://www.coindesk.com/rise-of-asics-bitcoin-mining-history">Bitcoin mining evolution paper</a>.
<tr><td><b>April 2020</b><td>Closing quote in this <a href="https://cacm.acm.org/magazines/2020/5/244325-will-risc-v-revolutionize-computing/fulltext?fbclid=IwAR2gT41IiQM9WUnP4gmgcUrgEhra2rE4I9MjwJjbmOchw26Ij0v6-WMauPQ">Communications of the ACM article on RISC-V</a>: Says Michael Taylor, an associate professor in the School of Computer Science and Engineering at the University of Washington in Seattle, "There are no serious technical or practical issues with RISC-V. It will eventually supplant x86 and ARM as the primary instruction set for microprocessors. It will fundamentally change the computing world."
<tr><td><b>July 2019</b><td>Twin tapeouts in 12nm of the BlackParrot RISCV multicore chip and also the HammerBlade ML/Graph supercomputer chip! I think it's safe to say that no other university research group in the world has taped out two 12nm chips in a single day, and especially not of this complexity! ;-)
<tr><td><b>May 2018</b><td>Released first version of Luis Vega's excellent <a href="http://bjump.org/f1">Amazon F1 Accelerator Tutorial</a>.
<tr><td><b>Mar 2018</b><td>Received a Google Faculty Research Award! <a href="https://news.cs.washington.edu/2018/03/26/allen-school-faculty-and-alumni-recognized-with-google-faculty-research-awards/">link</a>.
<tr><td><b>Feb 2018</b><td>Quoted in Bloomberg! <a href="https://www.bloomberg.com/news/articles/2018-02-12/bitcoin-chip-battle-brewing-behind-hut-8-s-canadian-listing">link</a>.
<tr><td><b>Feb 2018</b><td>Received an Albaba AIR Research Award! <a href="https://102.alibaba.com/fund/proposalResult.htm">link</a>.
<tr><td><b>Dec 2017</b><td>Interviewed by Wired for this article on <a href="https://www.wired.com/story/bitcoin-global-warming/">Global Bitcoin mining energy usage</a>.
<tr><td><b>Aug 2017</b><td>Interviewed in this article about Bitmain (the primary Chinese bitcoin mining chip company) moving into ML datacenter chips, an act foreshadowed by our work on <a href="https://qz.com/1053799/chinas-bitmain-dominates-bitcoin-mining-now-it-wants-to-cash-in-on-artificial-intelligence/">ASIC Clouds</a>.
<tr><td><b>Apr 2017</b><td>We taped out Celerity, a fully open source RISC-V chip with neural network accelerator that contains 511 RISC-V cores, in 16 nm TSMC technology. UCSD, Cornell and Michigan teamed together on this ambitious project and we completed the entire design and tapeout in less than a year. The architecture of this chip was published at Hotchips 2017, and was jointly presented by one student each from Cornell, Michigan, and my team, the Bespoke Silicon Group.
<tr><td><b>Mar 2017</b><td>Check out my guest <a href="http://sigarch.org"> sigarch</a> blog post on the <b><a href="https://www.sigarch.org/geocomp-comm-borg/">Geocomputer Computer and the Commercial Borg.</a></b> This is the lead article in a series of post by top computer architects across the planet! Local copy: <a href="https://bsg.ai/papers/Geocomputers_Taylor_SIGARCH_2017.pdf">pdf</a>.
<tr><td><b>Jan 2017</b><td>Sabbatical at Google in their datacenter accelerator group (until September)!
<tr><td><b>Dec 2016</b><td><b>Our second ASIC tapeout, a ten-core manycore RISC-V processor, sent to the fab on Dec 22!
<tr><td><b>Dec 2016</b><td><b> Our ASIC Cloud ISCA paper was accepted as an IEEE Micro Top Pick. This means it was one of the 12 best computer architecture papers out of the hundreds published in 2016!</b>
<tr><td><b>Nov 2016</b><td> Gave a talk at the fifth RISC-V workshop on some of <a href="https://youtu.be/IeowP8jFBq0">our open source activities</a>.
<tr><td><b>Nov 2016</b><td> Our ASPLOS paper was accepted. Congrats Moein, Lu, and Luis!
<tr><td><b>Oct 2016</b><td><b>Our first ASIC tapeout, a high speed communications interface chip, sent to the fab!
<tr><td><b>Jun 2016</b><td><b> <a href="https://bsg.ai/papers/ASIC_Cloud_ISCA_2016_Proceedings.pdf">ASIC Cloud paper</a></b> is out at ISCA. This <a href="https://bsg.ai/papers/ASIC_Cloud_ISCA_2016_Proceedings.pdf">paper</a> is <b>as big of a deal as our groundbreaking 2010 ASPLOS paper<br> that showed the utilization wall that causes dark silicon, and proposed specialization as the solution.</b><br> We show how datacenters full of ASIC accelerators are the next step for computer architecture,<br> and show the entire TCO analysis, and a prototypical architecture and methodology for designing 4 kinds of ASIC clouds.
<tr><td><b>Aug 2016</b><td>Invited Talk at DARPA / MTO CHIPS Workshop!
<tr><td><b>Jun 2016</b><td>See my talk, <a href="https://youtu.be/VXx0cK3wOKc?t=3h14m18s"> on open source hardware at the Architecture 2030 workshop.</a> (<a href="http://arch2030.cs.washington.edu/slides/arch2030_michael_taylor.pdf">slides</a>).
<tr><td><b>May 2016</b><td><a href="https://csetechrep.ucsd.edu/Dienst/UI/2.0/Describe/ncstrl.ucsd_cse/CS2016-1016">Tech report on ASIC Cloud released.</a>
<tr><td><b>Jan 2016</b><td>NSF has funded our $3M proposal, joint with Rosario Gennaro (CUNY), Abhi Shelat (UVa), Siddhartha Garg (NYU), Mariana Raykova (Yale), and my group (Bespoke Silicon Group). This is exciting!
<tr><td><b>Sept 2015</b><td>Presented <a href="http://cortexsuite.org">CortexSuite</a> to DARPA StarNet SONIC center at UIUC!
<tr><td><b>Sept 2015</b><td>Official <a href="http://kremlin.ucsd.edu">release of Kremlin</a> is finally out thanks to Prof. Sat Garcia!!
<tr><td><b>Apr 29 2015</b><td>Final interview about possibilities for dark silicon in <a href="http://semiengineering.com/one-on-one-dark-possibilities">this article</a>.
<tr><td><b>Apr 14 2015</b><td>Interview about Dark Servers in <a href="http://semiengineering.com/one-on-one-dark-silicon-2/">this article</a> in <i>Semiconductor Engineering</i>.
<tr><td><b>Apr 9 2015</b><td>One on one interview about Dark Silicon in <a href="http://semiengineering.com/one-on-one-dark-silicon/">this article</a> in <i>Semiconductor Engineering</i>.
<tr><td><b>Feb 2015</b><td>MBT serves as General Chair of HPCA 2015!
<tr><td><b>Feb 2015</b><td>Quoted discussing 14nm in <a href="http://semiengineering.com/talking-about-dark-silicon/">this article</a> in <i>Semiconductor Engineering</i>.
<tr><td><b>Jan 2015</b><td>Our work on Dark Silicon and GreenDroid is extensively
discussed in <a href="semi_engineering_darker_side.pdf">this article</a> at <i>Semiconductor Engineering</i>.
<tr><td><b>Nov 2014</b><td>My work on Bitcoin referenced in this <a href="http://www.coindesk.com/bitcoin-mining-can-longer-ignore-moores-law/">coindesk article</a> on Moore's Law.
<tr><td><b>Sep 2014</b><td>More of my work related to Bitcoin references in <a href="http://www.coindesk.com/cryptocurrency-miners-turn-exotic-cooling-systems-competition-heats/">this coindesk article on immersion cooling</a> with a few quotes from me.
<tr><td><b>June 2014</b><td>My views on a DAC panel quoted and discussed in Brian Fuller's article in semiengineering.com on <a href="http://semiengineering.com/computer-visions-enormous-challenges-ahead/">challenges for Computer Vision chips</a>.
<tr><td><b>June 2014</b><td> Interviewed in <a href="https://bitcoinmagazine.com/13774/government-bans-professor-mining-bitcoin-supercomputer/">this article in Bitcoin magazine</a>.
<tr><td><b>May 2014</b><td><a href="http://www.kornferry.com/institute/what-hll-bitcoin-fools-gold-or-real-thing">Article in Korn Ferry Institute</a> featuring my CASES paper.
<tr><td><b>May 2014</b><td><a href="http://randomwalker.info/teaching/spring-2014-privacy-technologies/state-attack.pdf">This work on state attacks on Bitcoin</a> employs the models in my 2013 CASES paper on Bitcoin mining.
<tr><td><b>Mar 2014</b><td>My Bitcoin mining paper work referenced in <a href="http://www.allied-control.com/publications/Full_Version_Bitcoin_2-Phase_Immersion_Cooling_and_the_Implications_for_HPC.pdf">Electronic Cooling Magazine</a>.
<tr><td><b>Mar 2014</b><td> See my <a href="https://www.youtube.com/watch?v=e25IwXZNJ6M">E3S Talk, entitled "A Landscape of the New Dark Silicon Regime"</a>. I gave a similar talk at DATE 2014 in Dresden, Germany.<br><br>
Here is some <a href="http://www.eejournal.com/archives/articles/20140410-date/">press in the EE Journal Blog</a>.
<tr><td><b>Jan 2014</b><td>Article in <a href="http://www.datacenterknowledge.com/archives/2014/01/21/bitcoin-infrastructure-mining-data-center/3/">Data Center Knowledge</a> discussing my Bitcoin CASES paper.
<br><br>
<tr><td><b>Dec 2013</b><td> I helped a reporter from the <b>New York Times</b>, Nathaniel Popper, as he deliberated on whether to fly to Iceland to meet a stranger and view their installation! He put together <a href="http://dealbook.nytimes.com/2013/12/21/into-the-bitcoin-mines/">this great story</a> on recent developments in Bitcoin mining. (I am quoted a few times.)<br><br>
Also quoted in a <a href="http://venturebeat.com/2013/12/22/nyt-how-a-programmer-paid-6m-in-bitcoin-for-two-pizzas-and-other-tales-from-the-digital-currency-mines/">Venture Beat article</a>.
<tr><td><b>Oct 2013</b><td> Because of some of my Bitcoin knowledge, a few newspapers, radio shows, and a TV show <b>interviewed me about Bitcoin, Tor and the Silk Road takedown</b>:
<br><br>
<table>
<tr><td><b>Al Jazeera America</b> <br> (Live National TV)<br><br>
<td><table><tr><td> <img width="200" src="pics/mt_daily_news.png" alt="MBT on News Show"> <td> <a href="http://cseweb.ucsd.edu/~mbtaylor/news-cycle.html"><i>Consider This</i> with Antonio Mora<br><br> (15 min TV spot)</a></table>
<td>10/3/13
<tr><td><b>Baltimore Sun</b><br><br>
<td><a href="http://www.baltimoresun.com/news/maryland/sun-investigates/bs-md-silk-road-tech-20131006,0,1970642.story">Silk Road arrest exposes a hidden Internet</a>
<td>10/6/13
<tr><td><b> UK Telegraph</b><br><br>
<td><a href="http://www.telegraph.co.uk/news/worldnews/northamerica/usa/10356444/Hit-men-drugs-and-the-fall-of-Ross-Ulbricht-the-Silk-Road-mastermind.html">Hit men, drugs and the fall of Ross Ulbricht, the Silk Road 'mastermind'</a>
<td>10/4/13
<tr><td><b>95.7 KJR: Bob Rivers </b><br><br>
<td><a href="http://www.957kjr.com/media/podcast-the-bob-rivers-show-podcast-bobriverspodcast/part-4-october-3rd-2013-the-23795072/">Professor Michael B Taylor on the end of Silk Road (10 min spot)</a>
<td>10/3/13
<tr><td><b>Los Angeles Times</b>
<td><a href="http://www.latimes.com/business/la-fi-silk-road-bitcoin-20131003,0,7857459.story">End of Silk Road for drug users as FBI shuts down illicit site</a> <br> <i><font size="-2">Note: Misquoted. Didn't say "disagree with his con";<br> I said "we are uneasy with the moral implications of his actions." </font></i>
<td>10/2/13
<tr><td><b>Newcastle Herald</b><br><br>
<td><a href="http://www.theherald.com.au/story/1822116/the-end-of-the-silk-road-paved-with-gold/?cs=5">The end of the Silk Road paved with gold</a>
<td>10/5/13
<tr><td><b>Times of Mumbai</b><br><br>
<td><a href="Hit men, drugs and the fall of Ross Ulbricht, the Silk Road ‘mastermind’">Hit men, drugs and the fall of Ross Ulbricht</a>
<td>10/4/13
</table>
<tr><td><b>Sep 2013</b><td> I helped a reporter from the <b>Wall Street Journal</b> put together this <a href="http://online.wsj.com/article/SB10001424127887324665604579079721277783300.html">front page article on Bitcoin mining</a>.
<tr><td><b>Sep 2013 </b><td> New CASES paper, <a href="https://bsg.ai/papers/bitcoin_taylor_cases_2013.pdf">Bitcoin and the Age of Bespoke Silicon</a>.
<tr><td><b>Sep 2013 </b><td> New IEEE Micro paper, A Landscape of the New Dark Silicon Design Regime.
<tr><td><b>May 2013</b><td> <table><tr><td>My PhD student, Jack Sampson <td> -> tenure-track assistant professor @ <a href="http://www.cse.psu.edu/~sampson/">Penn State</a>.
<tr><td>My PhD student, Saturnino Garcia <td> -> tenure-track assistant professor @ <a href="http://home.sandiego.edu/~sat/">University of San Diego</a>. </table>
<tr><td><b>Jan 2013</b><td> <table><tr><td> <a href="http://www.src.org/program/starnet/c-far/"><img width="20%" align="middle" src="pics/CFar.jpg">DARPA StarNet's $28 Million C-FAR center. </a> </table>
<tr><td><b>June 2012</b><td>I presented my paper <a href="https://bsg.ai/papers/taylor_dark_silicon_horsemen_dac_2012.pdf">
<b>Is Dark Silicon Useful?<br> <i>Harnessing the Four Horsemen of the Coming Dark Silicon Apocalypse</i></b></a> (<a href="https://bsg.ai/papers/DAC_DaSi_Horsemen_2012_Slides_Final.pdf">slides</a>) at DAC 2012 and DaSi 2012.
<br>
<br>
<tr><td><b>November 2012</b><td>Quoted in this <a href="http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=06353446">article</a> in the November 2012 IEEE Computer Magazine on Exascale computing.
<tr><td><b>May 2012</b><td>Quoted right at the beginning of this <a href="https://bsg.ai/papers/ProcessorMay2012.pdf">May 2012 IEEE Computer Magazine Article</a> on Dark Silicon, right after Bill Dally! GreenDroid and Conservation Cores get a big shout-out for being a key approach for attacking the Dark Silicon problem.
<tr><td><b>March 2011</b><td> GreenDroid IEEE Micro article, <a href="https://bsg.ai/papers/GreenDroid_IEEE_Micro_2011.pdf"><i>The GreenDroid Mobile Application Processor: An Architecture for Silicon's Dark Future</i></a> now available!
<tr><td><b>Nov 2010</b><td> UCSD ACM Programming Team, which I coach, invited to Worlds in Egypt!
<tr><td><b>Aug 2010</b><td> We present our GreenDroid mobile application processor design at Hotchips! Our Hotchips work was the only academic talk in the entire conference.<br><br> Broad coverage in the media:
<br><br>
<hr>
<table cellpadding=5 >
<tr><td>MIT Technology Review <td> <a href="http://www.technologyreview.com/computing/37478/?p1=A4&a=f">App-Specific Processors to Fight Dark Silicon.</a>
<tr><td>EETimes <td> <a href="http://www.eetimes.com/electronics-news/4206408/Android-processor-shines-light-on-dark-silicon">Android processor shines light on dark silicon.</a>
<tr><td width="25%">San Diego Tribune <td> <a href="http://www.signonsandiego.com/news/2010/sep/03/ucsd-new-technology-will-extend-smartphone-batter/">UCSD: New technology will extend smartphone battery life.</a>
<tr><td>IEEE Spectrum <td> <a href="http://spectrum.ieee.org/tech-talk/semiconductors/processors/greendroid-application-processor-will-battle-dark-silicon">GreenDroid Application Processor Will Battle Dark Silicon.</a>
<tr><td>Register.co.uk <td> <a href="http://www.theregister.co.uk/2010/06/28/hot_chips_22_preview/">CPU, GPU makers gussie up their wares for Hot Chips.</a>
<tr><td>EETimes Asia <td> <a href="http://www.eetasia.com/ART_8800617556_499489_NT_e27d6253.HTM">UCSD researchers develop efficient app-specific cores.</a>
<tr><td>Slashdot<td><a href="http://hardware.slashdot.org/story/11/04/30/0051219/The-Fight-Against-Dark-Silicon">The Fight Against Dark Silicon.</a>
<tr><td>ExtremeTech.com<td><a href="http://www.extremetech.com/extreme/166413-post-post-pc-the-new-materials-tech-and-cpu-designs-that-will-revive-overclocking-and-enthusiast-computing">Post-post-PC:The new materials, tech and CPU designs</a>
<tr><td>Embedded Insights <td> <a href="http://www.embeddedinsights.com/channels/2010/08/27/ucsd-turns-on-the-light-on-dark-silicon/">UCSD turns on the light on dark silicon.</a>
<tr><td>Light Reading <td> <a href="http://www.lightreading.com/document.asp?doc_id=196056&">Chip Design Fights Smartphone Power Limits.</a>
<tr><td>inhabitat <td> <a href="http://inhabitat.com/2010/09/01/dark-silicon-could-boost-smartphone-battery-life-11-x/">'Dark Silicon' Could Boost Smartphone Battery Life 11X.</a>
<tr><td>Slashdot.org <td> <a href="http://hardware.slashdot.org/story/11/04/30/0051219/The-Fight-Against-Dark-Silicon">The fight against dark silicon</a>
</table>
<hr>
<tr><td><b>May 2010</b><td> HOTCHIPS paper on our C-core-based chip accepted: <br> <a href="https://bsg.ai/papers/HotChips2010-Goulding-final.pdf">GreenDroid: A Mobile Application Processor for a Future of Dark Silicon.</a><br>First conference publication to have dark silicon in the title.
<tr><td>
<b>Nov 2009</b><td> Just released <i>The San Diego Vision Benchmark Suite</i>, a benchmark for the vision application domain, written in MATLAB and clean C.
It's available at <a href="http://cseweb.ucsd.edu/~mbtaylor/vision">parallel.ucsd.edu/vision</a>.
<tr><td><b>Nov 2009</b><td> Our paper, <i>Conservation Cores: Reducing the Energy of Mature Computations</i>, was accepted into ASPLOS.<br>
If you read one architecture paper this year, read this <a href="https://bsg.ai/papers/asplos_2010_ccores.pdf">ASPLOS Paper</a>. First paper that describes the utilization wall that is the
source of dark silicon, and proposes that heterogeneity is the answer.
<tr><td><b>July 2009</b><td> Successfully passed the FAA written test and landed an airplane four times at Long Beach Airport (LGB)!
<tr><td><b>June 2009</b><td> National Science Foundation CAREER Award: <a href="http://www.nsf.gov/awardsearch/showAward.do?AwardNumber=0846152">Energy-Efficient Parallel Architectures for Computer Vision</a>.
</table>
<br>
<h2>FAQ</h2>
<hr>
<b><i>Who came up with the term "dark silicon"?</i></b>
<br><br>
The first use of the term in print was a quote by Bob Metcalfe in March 1997 in the IEEE Internet Computing magazine. However
he was referring to all of the sand in the world that has not yet been turned into chips!
The first mention of the term I've seen in its current context was by ARM CTO Mike Muller at ARM techcon in October 2009. I've heard other folks
say that the term was used by others in ARM and/or HiPeaC community earlier than then. Although ARM techcon happened
after we had submitted our ASPLOS paper in Aug 2009 that discussed the utilization wall,
we thought it was genius and decided to use the term in the title of our immediately following
Hotchips 2010 paper.
<br><br> <b><i>How did our group arrive at the <i>utilization wall</i> which causes Dark Silicon, and specialization as an approach to attacking it?</i></b>
<br><br> In 2003, I spent a few months reading 300+ <a href="isscc.org">ISSCC</a>
and <a href="http://www.his.com/~iedm/">IEDM</a> papers with the goal of comparing the (very different) IBM CMOS7SF
and Intel P858 fabrication processes as part of a Raw-versus-Pentium-3 section of the <A HREF="https://bsg.ai/papers/raw_isca_2004.pdf">Raw ISCA paper</A> I was working on.
I was also trying to understand VLSI scaling better so that we could make better proofs about Raw's optimality.
<br><br>In 2004, I was trying to come up with some ideas for research as a faculty member.
I decided to analyze the scalability of multicore chips like Raw across process generations. Using skills picked up from the study
I did for the Raw ISCA paper,
I arrived at the conclusion that there was an <b><i>exponentially</i> worsening power issue with multicore scaling and that the problem
was the utilization wall and the dark silicon it creates</b>. The analysis is the same as appears in our subsequent grant proposals and papers.
<br><br>
On the interview trail for faculty positions in 2005, I tried to sell the idea of the utilization wall
one-on-one with interviewing faculty and further proposed that the "ugly chip" (a massively heterogeneous design) was
a logical response. Most everybody didn't believe me or thought it was a terrible idea (James Hoe of CMU, to his credit,
thought it was interesting.).
<br> <br>In 2006, as brand new faculty members,
Steve Swanson and I <a href="https://bsg.ai/papers/cpa2006-descr-p1.pdf">cowrote a peer-reviewed 2006 NSF proposal</a> that
outlined the utilization wall and created a plan for exploring massively heterogeneous solutions.
(Indeed, Steve named our analysis the
utilization wall, and already himself had a CAREER award on software aspects of heterogeneity.)
<br><br>(Here is a <a href="arsenal-snap-4-2007.html">April 2007 snapshot of our public website</a> talking about the utilization wall.)
<br><br>After one round
of rejection by peer review, the proposal was funded. The utilization wall
appears in the <a href="http://nsf.gov/awardsearch/showAward.do?AwardNumber=0811794">abstract of our NSF Award in July 2008.</a>
<br><Br>After
many paper resubmissions, countless co-advising trials and tribulations, we
finally got the utilization wall in peer-reviewed academic literature <a
href="https://bsg.ai/papers/asplos_2010_ccores.pdf">in this March 2010 ASPLOS paper</a>. <br>
<br><h2><font color="#000077">MIT Raw Processor</font></h2><hr>
<IMG src="pics/chip-16.jpg" align="left" ALT="Raw Chip"
hspace="20" vspace="15">
As one of the lead students in the <a href="http://cag.csail.mit.edu/raw">
MIT Raw project</a>, I led the design and implementation
of the Raw microprocessor, which targeted the leading VLSI technology of the time.
I also contributed heavily to almost all of the software systems that we built to support the
microprocessor. <br><br>
Raw was one of the earliest fabricated multicore processors, with 16 cores on a single die, back in 2002.
The purpose of Raw was to demonstrate architectural solutions to scalability problems
in modern day microprocessors. The Raw architecture exposes the transistor resources
of VLSI chips through the <font color="#0000FF"><i>tile</i></font> abstraction, the pin resources through the
<font color="#0000FF"><i>I/O port</i></font> abstraction, and the wiring resources
through <font color="#0000FF"><i>on-chip networks</i></font>. Raw was commercialized into the <a href="http://www.tilera.com">Tilera TILE64 architecture</a>.
<br>
<br>Because the Raw architecture exposed the on-chip resources more effectively than existing
sequential architectures (for instance the P6 micro-architecture, the basis of
the Pentium-M), Raw was able to outperform Intel desktop
processors, implemented with better process technology, across a variety of applications.
<br><br>
One of the key ideas that came out of the Raw research was the
formulation of the <A
HREF="https://bsg.ai/papers/Taylor-TPDS-05.pdf">Scalar
Operand Network</A> (SON), a unique class of sub-nanosecond network
responsible for routing operands between functional units and memories
in a distributed microprocessor.
<br><br> My team implemented the 16-tile Raw microprocessor, shown to
the upper-left, in IBM's SA-27E 180 nm 6-layer Cu ASIC process. The
18.2 mm x 18.2 mm chip was, at least at the time, the largest design
that the IBM ASIC division had targeted for SA-27E. Each tile contains
computing power equivalent to a single-issue pipelined processor.
A supercomputer prototype, based on 4-chip boards, that scaled to 64 Raw chips (1024-issue) was
constructed.
<br>
<br>
More pictures are available <a HREF="http://cag.csail.mit.edu/raw/gallery/index.html">here</a>.
<br><br><br>
<h2><font color="#000077">Technology Policy Advocacy</font></h2>
<hr width="100%">
<table>
<tr><td width="130"><td>
Here are my notes about <a href="http://cseweb.ucsd.edu/~mbtaylor/news-cycle.html">Getting Interviewed as an Expert on TV</a>, based on my experiences getting interviewed by various newspapers, radio shows, and a live TV news program about Bitcoin and the Silk Road.
<br><br>
<a href="https://bsg.ai/papers/superdmca.pdf">
Testimony</a> regarding Massachusetts House Bill No. 2743, entitled <b>An Act to Improve Broadband and Internet Security</b>, <br> at
Massachusetts Joint Committee On Criminal Justice on April 2, 2003.
<br>
<br>
This testimony was <a href="http://www.freedom-to-tinker.com/superdmca.html">referenced</a> by Ed Felton's <i>Freedom to Tinker</i> website and discussed
in a <a href="http://www.law.wfu.edu/prebuilt/IPLJ_4_2_Verga.pdf">law journal article</a>:
<br>
<br>
<i>"Super-DMCA" Statutes: Putting Hollywood in Charge of Internet Business</i>,<br> Matthew A. Verga, Wake Forest Intellectual Property Law Journal 104, May 2004.
</table>
<h1>CSE MBT</h1>
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dark silicon
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Bespoke Silicon Group.
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Dark Silicon
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| /semi_engineering_darker_side.pdf |
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Показать первые 100 внешних ссылок
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MIT
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| bsg.ai |
MIT Raw tiled
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a paper that derives the <i>utilization wall</i> that causes dark silicon
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in this innovative study
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before
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disclosed in ASPLOS 2021.
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Communications of the ACM ASIC Cloud paper
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NRE
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My colleagues and I
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utilization wall
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Conservation Cores
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ASPLOS 2010
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Hotchips 2010
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March 2011 IEEE Micro paper
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youtube
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DAC and DaSi 2012
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slides
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Kremlin
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<i>hierarchical critical path analysis</i>
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Prof. Serge Belongie
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| cortexsuite.org |
CortexSuite
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| bsg.ai |
Click to view all publications
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teaser talk; contains only part of paper
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5/8/16 Tech Report
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Talk
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Download SD-VBS
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